Explain the difference between write through and write back cache.

2 Answers   Intel,

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How can you model a SRAM at RTL Level?

0 Answers   Infosys,

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What are the changes that are provided to meet design power targets?

0 Answers  

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What is the depletion region?

1 Answers  

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Explain Custom Design Flow?

2 Answers   Intel,

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Explain what is the depletion region?

0 Answers  

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Are you familiar with VHDL and/or Verilog?

1 Answers   Intel,

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Basic Stuff related to Perl?

0 Answers   Intel,

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In what cases do you need to double clock a signal before presenting it to a synchronous state machine?

1 Answers   Intel,

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Draw the stick diagram of a NOR gate. Optimize it

0 Answers   Infosys,

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Factors affecting Power Consumption on a chip?

7 Answers   Intel,

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what is charge sharing?

0 Answers   Intel,

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