What are the two types of noise of MOSFET, how to eliminate them?(Thermal and Flicker).

4 Answers   Analog Devices,

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Mention what are three regions of operation of mosfet and how are they used?

0 Answers  

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Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?

4 Answers   Intel,

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What happens to delay if we include a resistance at the output of a CMOS circuit?

1 Answers   Infosys,

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Draw the Cross Section of an Inverter? Clearly show all the connections between M1 and poly, M1 and diffusion layers etc?

0 Answers   Intel,

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Tell me how BJT works.

2 Answers  

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What is setup time and hold time?

1 Answers   Intel,

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Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45m wide metal wire with sheet resistance R = 0.065 / and Cpermicron= 0.25 fF/m. The resistance and capacitance of the unit NMOS are 6.5k and 2.5fF. Use a 3 segment -model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.

0 Answers  

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How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?

0 Answers   Infosys,

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Explain the Charge Sharing problem while sampling data from a Bus?

0 Answers  

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Advantages and disadvantages of Mealy and Moore?

2 Answers   Intel,

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Approximately, what were the sizes of your transistors in the SRAM cell? How did you arrive at those sizes?

0 Answers   Infosys,

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