Is there a possibility to use such a treshold voltage for the NMOS part of a CMOS circuit that during the switching it will start conducting only after the PMOS part will be already closed, by this eliminating the leakedge current? Please note, I'm not asking about the well bias in standby mode, but about the "antileakedge" measures during normal operation.

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What is resolver and glass scale in CNC how they work?

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i need the details about bhel exam.how to apply for that.please send to my email-id.thenmozhi2k7@gmail.com

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how to calculate kvar in Akiva

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How out of step protection relay works?

0 Answers   APL,

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What is the advantangeous over SFU (switch fuse Unit) & FsU (Fuse Switch unit) which one is better & application of Both?

2 Answers  

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why we use condenser in the thermal power plant, althrough the same vapour will be again heated

2 Answers  

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How is the percentage impedence of a transformer fixed at design stage???

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What is fault level?How it is calculated and how it is Expressed?

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WHAT HAPPEN IF LT SUPPLY 415 V FED TO THE HT 3.3KV MOTOR

1 Answers  

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why we use post insulators in no ofstacks at substation for supporting equipment ? why we not use single post insulator

3 Answers  

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What is the function of Lightning Arrester & Wavetrap in Power system ??

18 Answers   ABB, Bhel, Energy Infratech, Infosys, NTPC,

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