86 Family (470)
VLSI (297)
DSP (55)
Embedded Systems AllOther (399) If a1M1× DRAM requires 4 ms for a refresh and has 256 rows to be refreshed, no more than __________ of time must pass before another row is refreshed.
CDAC,
1379In which T-state does the CPU sends the address o memory or I/O and the ALE signal for Demultiplexing
CDAC,
1582What number of the times the instruction sequence below will loop before coming out of loop is MOV AL, 00hA1: INC AL JNZ A1
CDAC,
1517
Explain the Charge Sharing problem while sampling data from a Bus?
What type of software simulator and developer have you used?
Can you please explain the difference between mutexes vs semaphores?
What is the purpose of Program Counter in a Micro - Processor?
How i/o devices are classified for embedded system?
Explain the working of 4-bit Up/down Counter?
Indicate different machine cycles of 8085?
What is the function of tie-high and tie-low cells?
What is the use of microprocessors?
What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus
Explain the two types of software?
What is continuous integration? Why is it important?
What is so great about
Mention interrupts pins of 8085?
Program to print the 32 number in form of binary, Hexa and ASCI.