86 Family (470)
VLSI (297)
DSP (55)
Embedded Systems AllOther (399) If a1M1× DRAM requires 4 ms for a refresh and has 256 rows to be refreshed, no more than __________ of time must pass before another row is refreshed.
CDAC,
1327In which T-state does the CPU sends the address o memory or I/O and the ALE signal for Demultiplexing
CDAC,
1535What number of the times the instruction sequence below will loop before coming out of loop is MOV AL, 00hA1: INC AL JNZ A1
CDAC,
1468
What is the difference between a web server, web farm and web garden? How would your web application need to change for each?
What is a inode?
Using four cascaded counters with a total of 8 bits, how many states must be deleted to achieve a modulus of 20,000?
What are the major differences in short label and near label jump instructions?
Tell me what is interrupt latency? How can you reduce it?
What is the maximum supported clock speed of the 8086?
Define microcontroller?
What are the different gates where boolean logic are applicable?
State the number and type of registers in the 8086?
Explain the properties of a object oriented programming language.
Name the pin in 8086 microprocessor that is used for selecting mode of operation?
What is a 'const' variable?
What is loop unrolling?
Tell me about 3 times you failed.
Define digital signal.