VLSI Interview Questions, Answers for Freshers and Experienced asked in various Company Job Interviews

VLSI Interview Questions

Questions Answers Views Company eMail

While using logic design, explain the various steps that r followed to obtain the desirable design in a well defined manner?

Intel,

1 6930

Why is OOPS called OOPS? (C++)

ARM, Intel,

1 5511

What is a linked list? Explain the 2 fields in a linked list?

Intel,

1 8307

Implement a 2 I/P and gate using Tran gates?

Intel,

4017

Insights of a 4bit adder/Sub Circuit?

Intel,

3375

For f = AB+CD if B is S-a-1, what r the test vectors needed to detect the fault?

Intel,

5 14121

Explain various adders and diff between them?

Intel,

1 5521

Explain the working of 4-bit Up/down Counter?

Intel,

4440

A circuit has 1 input X and 2 outputs A and B. If X = HIGH for 4 clock ticks, A = 1. If X = LOW for 4 clock ticks, B = 1. Draw a state diagram for this Spec?

Intel,

3 9887

Advantages and disadvantages of Mealy and Moore?

Intel,

2 40717

Id vs. Vds Characteristics of NMOS and PMOS transistors?

Brillient, Intel, ISRO,

1 17212

Explain the operation of a 6T-SRAM cell?

Intel,

4518

Differences between DRAM and SRAM?

Infosys, Intel, University, Wipro,

14 72848

Implement a function with both ratioed and domino logic and merits and demerits of each logic?

Intel,

3803

Given a circuit and asked to tell the output voltages of that circuit?

Intel, Omega Healthcare,

1 5131

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Un-Answered Questions { VLSI }

Draw a 6-T SRAM Cell and explain the Read and Write operations

1292

Explain what is multiplexer?

1089

Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram

1487

Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45m wide metal wire with sheet resistance R = 0.065 / and Cpermicron= 0.25 fF/m. The resistance and capacitance of the unit NMOS are 6.5k and 2.5fF. Use a 3 segment -model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.

3871

Draw a CMOS Inverter. Explain its transfer characteristics

1194

What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?

3273

What is the function of enhancement mode transistor?

1124

What are the ways to Optimize the Performance of a Difference Amplifier?

2453

If not into production, how far did you follow the design and why did not you see it into production?

2110

Draw the Layout of an Inverter?

2508

What happens if we use an Inverter instead of the Differential Sense Amplifier?

3318

Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing Vgs.

1122

Are you familiar with the term snooping?

3531

What is the critical path in a SRAM?

3203

In Verilog code what does “timescale 1 ns/ 1 ps” signifies?

1224

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