VLSI Interview Questions
Questions Answers Views Company eMail

6-T XOR gate?

Intel,

3786

Differences between blocking and Non-blocking statements in Verilog?

Intel,

5 19057

Differences between Signals and Variables in VHDL? If the same code is written using Signals and Variables what does it synthesize to?

IIT, Intel,

1 19649

Differences between functions and Procedures in VHDL?

Intel,

5 52586

What is component binding?

Intel,

2 5161

What is polymorphism? (C++)

Intel,

2 5075

What is hot electron effect?

Intel,

3 11736

Define threshold voltage?

College School Exams Tests, Intel, JHG, Wipro,

32 125480

Factors affecting Power Consumption on a chip?

Intel,

7 14802

Explain Clock Skew?

Intel, nvidia,

6 19281

Why do we use a Clock tree?

Intel,

3 12192

Explain the various Capacitances associated with a transistor and which one of them is the most prominent?

Intel,

2 7136

Explain the Various steps in Synthesis?

Intel,

2822

Explain ASIC Design Flow?

Intel, JK Associates, Mind Tree,

2 14304

Explain Custom Design Flow?

Intel,

2 6108


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Un-Answered Questions { VLSI }

What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus

779


How binary number can give a signal or convert into a digital signal?

684


Draw a CMOS Inverter. Explain its transfer characteristics

667


Approximately, what were the sizes of your transistors in the SRAM cell? How did you arrive at those sizes?

685


What are the various regions of operation of mosfet? How are those regions used?

583






Insights of a 4bit adder/Sub Circuit?

2841


What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?

2736


what is SCR (Silicon Controlled Rectifier)?

621


What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?

760


What transistor level design tools are you proficient with? What types of designs were they used on?

2867


You have three adjacent parallel metal lines. Two out of phase signals pass through the outer two metal lines. Draw the waveforms in the centre metal line due to interference. Now, draw the signals if the signals in outer metal lines are in phase with each other

951


What are the different ways in which antenna violation can be prevented?

659


If an/ap = 0.5, an/ap = 1, an/ap = 3, for 3 inverters draw the transfer characteristics?

2004


Give various factors on which threshold voltage depends.

749


what is Slack?

697