Suppose you have a combinational circuit between two registers driven by a clock. What will you do if the delay of the combinational circuit is greater than your clock signal? (You can't resize the combinational circuit transistors)
6 11403Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?
3 11187For a single computer processor computer system, what is the purpose of a processor cache and describe its operation?
1848Explain the operation considering a two processor computer system with a cache for each processor.
4281
Design an 8 is to 3 encoder using 4 is to encoder?
Explain Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
What is the critical path in a SRAM?
Draw a CMOS Inverter. Explain its transfer characteristics
For f = AB+CD if B is S-a-1, what are the test vectors needed to detect the fault?
What are the Factors affecting Power Consumption on a chip?
What are the different ways in which antenna violation can be prevented?
What transistor level design tools are you proficient with? What types of designs were they used on?
Why do we gradually increase the size of inverters in buffer design? Why not give the output of a circuit to one large inverter?
Differences between Array and Booth Multipliers?
Explain the working of Insights of a pass gate ?
How to improve these parameters? (Cascode topology, use long channel transistors)
What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?
Mention what are the different gates where Boolean logic are applicable?
what is multiplexer?
