VLSI Interview Questions
Questions Answers Views Company eMail

what is conductance and valence band?

1 3036

What is Fermi level?

5 4475

How does Vbe and Ic change with temperature?

Qualcomm,

1694




If the substrate doping concentration increase, or temperature increases, how will Vt change? it increase or decrease?

1104

what is Channel length modulation?

Intel,

1402

what is the doping?

5 2982

How does a pn junction works?

Wipro,

1 3510

What is the depletion region?

1 2832




Tell me the parameters as many as possible you know that used to character an amplifier?

818

What are the two types of noise of MOSFET, how to eliminate them?(Thermal and Flicker).

Analog Devices,

4 8302

What is the build-in potential?

Wipro,

842

Tell me how MOSFET works.

986

For a 0.18um and 0.8um technology MOSFET, which has a higher cutoff frequency?

2 6328

How does a Bandgap Voltage reference work?

1721

What is the ideal input and output resistance of a current source?

1567


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Un-Answered Questions { VLSI }

How about voltage source?

881


If an/ap = 0.5, an/ap = 1, an/ap = 3, for 3 inverters draw the transfer characteristics?

979


How can you model a SRAM at RTL Level?

3546


Tell me how MOSFET works.

986


Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.

1159


If not into production, how far did you follow the design and why did not you see it into production?

749


How can you construct both PMOS and NMOS on a single substrate?

2611


For a single computer processor computer system, what is the purpose of a processor cache and describe its operation?

817


Explain sizing of the inverter?

2705


How does a Bandgap Voltage reference work?

1721


Explain how MOSFET works?

1825


What is Noise Margin? Explain the procedure to determine Noise Margin?

938


Basic Stuff related to Perl?

1365


Insights of a 2 input NOR gate. Explain the working?

1511


Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45m wide metal wire with sheet resistance R = 0.065 / and Cpermicron= 0.25 fF/m. The resistance and capacitance of the unit NMOS are 6.5k and 2.5fF. Use a 3 segment -model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.

2325