VLSI Interview Questions
Questions Answers Views Company eMail

what is conductance and valence band?

1 2773

What is Fermi level?

5 4167

How does Vbe and Ic change with temperature?

Qualcomm,

1630




If the substrate doping concentration increase, or temperature increases, how will Vt change? it increase or decrease?

1064

what is Channel length modulation?

Intel,

1348

what is the doping?

5 2736

How does a pn junction works?

Wipro,

1 3243

What is the depletion region?

1 2584




Tell me the parameters as many as possible you know that used to character an amplifier?

782

What are the two types of noise of MOSFET, how to eliminate them?(Thermal and Flicker).

Analog Devices,

4 7983

What is the build-in potential?

Wipro,

798

Tell me how MOSFET works.

941

For a 0.18um and 0.8um technology MOSFET, which has a higher cutoff frequency?

2 6027

How does a Bandgap Voltage reference work?

1623

What is the ideal input and output resistance of a current source?

1511


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Un-Answered Questions { VLSI }

Draw the Layout of an Inverter?

829


What is Body Effect?

932


For a single computer processor computer system, what is the purpose of a processor cache and describe its operation?

772


What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?

1694


What products have you designed which have entered high volume production?

938


Explain the operation of a 6T-SRAM cell?

2710


What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?

871


Tell me the parameters as many as possible you know that used to character an amplifier?

782


What happens if we use an Inverter instead of the Differential Sense Amplifier?

1428


What happens if we delay the enabling of Clock signal?

800


If an/ap = 0.5, an/ap = 1, an/ap = 3, for 3 inverters draw the transfer characteristics?

911


Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45m wide metal wire with sheet resistance R = 0.065 / and Cpermicron= 0.25 fF/m. The resistance and capacitance of the unit NMOS are 6.5k and 2.5fF. Use a 3 segment -model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.

2226


How does a Bandgap Voltage reference work?

1623


What is the ideal input and output resistance of a current source?

1511


Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

731