Answer / sarojini

static ram is a volatile memory. so it is easy to model a
sram at rtl level

Advantages and disadvantages of Mealy and Moore?

2 Answers   Intel,

---

While using logic design, explain the various steps that r followed to obtain the desirable design in a well defined manner?

1 Answers   Intel,

---

If not into production, how far did you follow the design and why did not you see it into production?

0 Answers   Intel,

---

For f = AB+CD if B is S-a-1, what are the test vectors needed to detect the fault?

0 Answers   Intel,

---

Draw the Layout of an Inverter?

0 Answers   Intel,

---

Factors affecting Power Consumption on a chip?

7 Answers   Intel,

---

Working of a 2-stage OPAMP?

0 Answers   Intel, Tata Elxsi,

---

For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)

0 Answers   Infosys,

---

what is multiplexer?

0 Answers  

---

How binary number can give a signal or convert into a digital signal?

0 Answers  

---

Id vs. Vds Characteristics of NMOS and PMOS transistors?

1 Answers   Brillient, Intel, ISRO,

---

Mention what are the different gates where Boolean logic are applicable?

0 Answers  

---