What types of CMOS memories have you designed? What were
their size? Speed?
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In Verilog code what does “timescale 1 ns/ 1 ps” signifies?
What is the difference between synchronous and asynchronous reset?
Insights of a pass gate. Explain the working?
Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram
what is Latch up?How to avoid Latch up?
What is the function of enhancement mode transistor?
Basic Stuff related to Perl?
How does Vbe and Ic change with temperature?
Explain the Working of a 2-stage OPAMP?
Why is OOPS called OOPS? (C++)
Given a layout, draw its transistor level circuit. (I was given a 3 input AND gate and a 2 input Multiplexer. You can expect any simple 2 or 3 input gates)
Explain the operation considering a two processor computer system with a cache for each processor.