What is latchup? Explain the methods used to prevent it?

2 Answers   Intel,

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How can you model a SRAM at RTL Level?

1 Answers  

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For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)

0 Answers   Infosys,

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What?s the critical path in a SRAM?

2 Answers   Infosys, Intel, Texas,

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What are the different types of skews used in vlsi?

1 Answers  

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what is the difference between the testing and verification?

1 Answers   Intel,

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What are the various regions of operation of mosfet? How are those regions used?

0 Answers  

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What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus

0 Answers   Infosys,

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How does Resistance of the metal lines vary with increasing thickness and increasing length?

3 Answers   Infosys,

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Explain depletion region.

0 Answers  

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How does a Bandgap Voltage reference work?

0 Answers  

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For f = AB+CD if B is S-a-1, what are the test vectors needed to detect the fault?

0 Answers   Intel,

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