Given a layout, draw its transistor level circuit. (I was given a 3 input AND gate and a 2 input Multiplexer. You can expect any simple 2 or 3 input gates)

0 Answers   Infosys,

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What happens if we use an Inverter instead of the Differential Sense Amplifier?

0 Answers  

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What are set up time & hold time constraints? What do they signify?

3 Answers  

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Explain Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

0 Answers   Intel,

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How do you size NMOS and PMOS transistors to increase the threshold voltage?

0 Answers   Infosys,

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Implement a function with both ratioes and domino logic and merits and demerits of each logic?

0 Answers   Intel,

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For a 0.18um and 0.8um technology MOSFET, which has a higher cutoff frequency?

2 Answers  

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How do you size NMOS and PMOS transistors to increase the threshold voltage?

4 Answers  

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Explain sizing of the inverter?

0 Answers   Infosys,

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Draw a 6-T SRAM Cell and explain the Read and Write operations

0 Answers   Infosys,

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Explain the concept of a Clock Divider Circuit? Write a VHDL code for the same?

3 Answers   Intel,

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Explain why present VLSI circuits use MOSFETs instead of BJTs?

0 Answers  

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