Explain about 6-T XOR gate?

0 Answers   Intel,

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Give the various techniques you know to minimize power consumption?

5 Answers  

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What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?

0 Answers   Infosys,

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Explain the operation of a 6T-SRAM cell?

0 Answers   Intel,

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what is the difference between the testing and verification?

1 Answers   Intel,

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Approximately, what were the sizes of your transistors in the SRAM cell? How did you arrive at those sizes?

0 Answers   Infosys,

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Give the expression for CMOS switching power dissipation?

2 Answers   Infosys,

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Explain the difference between write through and write back cache.

2 Answers   Intel,

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Give various factors on which threshold voltage depends.

0 Answers  

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Are you familiar with VHDL and/or Verilog?

1 Answers   Intel,

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Why do we gradually increase the size of inverters in buffer design? Why not give the output of a circuit to one large inverter?

0 Answers   Infosys,

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What is charge sharing?

2 Answers   Cypress Semiconductor, Intel,

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