Answer / dileep goyal

1.The edge-triggered D flip-flop is easily derived from its
RS counterpart. The only requirement is to replace the R
input with an inverted version of the S input, which
thereby becomes D. This is only needed in the master latch
section; the slave remains unchanged.

One essential point about the D flip-flop is that when the
clock input falls to logic 0 and the outputs can change
state, the Q output always takes on the state of the D
input at the moment of the clock edge. This was not true of
the RS and JK flip-flops. The RS master section would
repeatedly change states to match the input signals while
the clock line is logic 1, and the Q output would reflect
whichever input most recently received an active signal.
The JK master section would receive and hold an input to
tell it to change state, and never change that state until
the next cycle of the clock. This behavior is not possible
with a D flip-flop.
2.Latchs: They are sensitive to the duration of pulse and
can transfer data until they are switched on. They hold the
last logic at the output if we put it off(bring the strobe
pin to low). They are used as temporary buffers.


FF: They are sensitive to signal change(low to high or
high to low) and not the level. Hence they transfer data
only at that instant and it cannot be changed until next
signal change. Due to this they are used as registers.
3.multiplexer is a device whan we give the one and more
input tnan it combine this and give only one output
4.By connecting J&K input terminal with a not gate. now
input
at j terminal.

Answer / nitesh.kr1234

i have need answers of hese Q.

Answer / ameer

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