Give the cross-sectional diagram of the cmos.

0 Answers  

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How can you model a SRAM at RTL Level?

1 Answers  

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Explain about stuck at fault models, scan design, BIST and IDDQ testing?

3 Answers   Intel,

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What is the mealy and moore machine's state diagram that can detect 3 consecutive heads of 3 coins ?

2 Answers  

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In the design of a large inverter, why do we prefer to connect small transistors in parallel (thus increasing effective width) rather than lay out one transistor with large width?

0 Answers   Infosys,

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What is the purpose of having depletion mode device?

0 Answers  

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6-T XOR gate?

0 Answers   Intel,

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Draw the stick diagram of a NOR gate. Optimize it

0 Answers   Infosys,

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Explain Clock Skew?

6 Answers   Intel, nvidia,

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What are the different limitations in increasing the power supply to reduce delay?

2 Answers  

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Explain what is Verilog?

0 Answers  

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Basic Stuff related to Perl?

0 Answers   Intel,

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