6-T XOR gate?
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Explain the working of 4-bit Up/down Counter?
Differences between netlist of HSPICE and Spectre?
Tell me the parameters as many as possible you know that used to character an amplifier?
Insights of a 2 input NAND gate. Explain the working?
What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?
What happens if we increase the number of contacts or via from one metal layer to the next?
Explain about stuck at fault models, scan design, BIST and IDDQ testing?
Are you familiar with the term snooping?
Explain Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
For CMOS logic, give the various techniques you know to minimize power consumption
Why do we need both PMOS and NMOS transistors to implement a pass gate?
what is the doping?