What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?

0 Answers   Intel,

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Implement F= not (AB+CD) using CMOS gates?

1 Answers   Intel,

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What?s the difference between Testing & Verification?

6 Answers   Infosys,

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Explain the operation considering a two processor computer system with a cache for each processor.

0 Answers   Intel,

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For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD

0 Answers   Infosys,

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Insights of a pass gate. Explain the working?

0 Answers   Intel,

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What transistor level design tools are you proficient with? What types of designs were they used on?

0 Answers   Intel,

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Explain Custom Design Flow?

2 Answers   Intel,

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Cross section of a PMOS transistor?

0 Answers   Intel,

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What is the function of tie-high and tie-low cells?

0 Answers  

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For CMOS logic, give the various techniques you know to minimize power consumption

0 Answers   Infosys,

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How to find the read failiure probablity in SRAM?

2 Answers  

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