In the design of a large inverter, why do we prefer to connect small transistors in parallel (thus increasing effective width) rather than lay out one transistor with large width?

0 Answers   Infosys,

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What is clock feed through?

2 Answers   Intel,

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Mention what are three regions of operation of mosfet and how are they used?

0 Answers  

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What are the different ways in which antenna violation can be prevented?

0 Answers  

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Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

0 Answers   Intel,

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Explain the Charge Sharing problem while sampling data from a Bus?

0 Answers  

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What transistor level design tools are you proficient with? What types of designs were they used on?

0 Answers   Intel,

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If the current through the poly is 20nA and the contact can take a max current of 10nA how would u overcome the problem?

0 Answers   Intel,

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What happens to delay if you increase load capacitance?

3 Answers   Infosys,

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Explain CMOS Inverter transfer characteristics?

0 Answers   ADS,

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For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD

0 Answers   Infosys,

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How do you detect if two 8-bit signals are same?

6 Answers  

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