Interested to Buy Any Domain ? << Click Here >> for more details...
In what cases do you need to double clock a signal before
presenting it to a synchronous state machine?
- 1 Answers
- 5557 Views
- Intel, I also Faced
- E-Mail Answers
Answer / sudeep
when ur transfering a data b/w two different clock domains,
ex:- The Fsm and ur outside design is working at different
frequencies, to synchronise these signals u do double
clocking to avoid metastability before transferring it into
the FSM.
| Is This Answer Correct ? | 8 Yes | 0 No |
Explain the various MOSFET Capacitances & their significance?
Why do we use a Clock tree?
Draw the timing diagram for a SRAM Read. What happens if we delay the enabling of Clock signal?
If an/ap = 0.5, an/ap = 1, an/ap = 3, for 3 inverters draw the transfer characteristics?
What is the difference between fifo and the memory?
6 Answers DewSoft, Intel, Pentagon Rugged Systems,
Why don?t we use just one NMOS or PMOS transistor as a transmission gate?
How do you detect a sequence of "1101" arriving serially from a signal line?
6-T XOR gate?
Explain the working of 4-bit Up/down Counter?
What was your role in the silicon evaluation or product ramp? What tools did you use?
Explain about 6-T XOR gate?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
86 Family 
