What happens if we use an Inverter instead of the Differential Sense Amplifier?

0 Answers   Infosys,

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Explain the concept of a Clock Divider Circuit? Write a VHDL code for the same?

3 Answers   Intel,

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What is Noise Margin? Explain the procedure to determine Noise Margin?

4 Answers   Amkor, Cisco, Infosys, Intel,

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What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?

0 Answers   Infosys,

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Cross section of an NMOS transistor?

3 Answers   Intel,

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Insights of a Tri-State Inverter?

3 Answers   Intel,

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Write a VLSI program that implements a toll booth controller?

0 Answers   Patni,

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Draw the SRAM Write Circuitry

0 Answers   Infosys,

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Are you familiar with VHDL and/or Verilog?

1 Answers   Intel,

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You have three adjacent parallel metal lines. Two out of phase signals pass through the outer two metal lines. Draw the waveforms in the centre metal line due to interference. Now, draw the signals if the signals in outer metal lines are in phase with each other

0 Answers   Infosys,

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What is the ideal input and output resistance of a current source?

0 Answers  

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Differences between DRAM and SRAM?

14 Answers   Infosys, Intel, University, Wipro,

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