Implement an Inverter using a single transistor?

4 Answers   Intel,

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Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45m wide metal wire with sheet resistance R = 0.065 / and Cpermicron= 0.25 fF/m. The resistance and capacitance of the unit NMOS are 6.5k and 2.5fF. Use a 3 segment -model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.

0 Answers  

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Who provides the DRC rules?

5 Answers   Intel,

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For f = AB+CD if B is S-a-1, what r the test vectors needed to detect the fault?

5 Answers   Intel,

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What is the purpose of having depletion mode device?

0 Answers  

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What is component binding?

2 Answers   Intel,

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Working of a 2-stage OPAMP?

0 Answers   Intel, Tata Elxsi,

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What are set up time & hold time constraints? What do they signify?

3 Answers  

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In vlsi chip 1000s of transistors are dropped, specifically categorized. Which method is used to achieve this & how it is done practically?

0 Answers  

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Implement a function with both ratioed and domino logic and merits and demerits of each logic?

0 Answers   Intel,

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Explain the usage of the shared SPI bus?

1 Answers  

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What is polymorphism? (C++)

2 Answers   Intel,

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