In Verilog code what does “timescale 1 ns/ 1 ps” signifies?

0 Answers  

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Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?

4 Answers   Intel,

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Insights of a 2 input NOR gate. Explain the working?

1 Answers   Infosys, Intel,

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If the current through the poly is 20nA and the contact can take a max current of 10nA how would u overcome the problem?

0 Answers   Intel,

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Have you studied buses? What types?

5 Answers   Intel,

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In what cases do you need to double clock a signal before presenting it to a synchronous state machine?

1 Answers   Intel,

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What is clock feed through?

2 Answers   Intel,

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What are the different classification of the timing control?

0 Answers  

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Basic Stuff related to Perl?

0 Answers   Intel,

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What are the different ways in which antenna violation can be prevented?

0 Answers  

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What are the different limitations in increasing the power supply to reduce delay?

2 Answers  

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Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

0 Answers   Intel,

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