How can you construct both PMOS and NMOS on a single substrate?
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What is Body Effect?
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what is SCR (Silicon Controlled Rectifier)?
What is FPGA?
what is short Channel effect.
A circuit has 1 input X and 2 outputs A and B. If X = HIGH for 4 clock ticks, A = 1. If X = LOW for 4 clock ticks, B = 1. Draw a state diagram for this Spec?
For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)
Give a big picture of the entire SRAM Layout showing your placements of SRAM Cells, Row Decoders, Column Decoders, Read Circuit, Write Circuit and Buffers
Explain what is the depletion region?
What are the Advantages and disadvantages of Mealy and Moore?
In a SRAM layout, which metal layers would you prefer for Word Lines and Bit Lines? Why?
Are you familiar with the term MESI?
Explain the Working of a 2-stage OPAMP?