Answer / salla nagaraju

When sampling data from a bus using CMOS transmission gates or multiplexers, charge sharing can occur, leading to incorrect logic levels at the output.

Explain what is Verilog?

0 Answers  

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What is the function of enhancement mode transistor?

0 Answers  

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What are the two types of noise of MOSFET, how to eliminate them?(Thermal and Flicker).

4 Answers   Analog Devices,

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Explain the various MOSFET Capacitances & their significance?

1 Answers  

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What is LVS, DRC?

10 Answers   IBM, Intel,

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what is body effect?

1 Answers  

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If not into production, how far did you follow the design and why did not you see it into production?

1 Answers   Intel,

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what is Channel length modulation?

2 Answers   Intel,

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what is Early effects and their physical origin.

1 Answers  

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How do you size NMOS and PMOS transistors to increase the threshold voltage?

0 Answers   Infosys,

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Have you studied pipelining? List the 5 stages of a 5 stage pipeline. Assuming 1 clock per stage, what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ?

3 Answers   Intel,

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Insights of a 2 input NOR gate. Explain the working?

1 Answers   Infosys, Intel,

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