Approximately, what were the sizes of your transistors in the SRAM cell? How did you arrive at those sizes?
681Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times
1052You have three adjacent parallel metal lines. Two out of phase signals pass through the outer two metal lines. Draw the waveforms in the centre metal line due to interference. Now, draw the signals if the signals in outer metal lines are in phase with each other
942What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?
757For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)
702Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram
834Why do we gradually increase the size of inverters in buffer design? Why not give the output of a circuit to one large inverter?
807
What is the repository pattern?
Can we use any function inside isr?
Are you familiar with the term snooping?
In vlsi chip 1000s of transistors are dropped, specifically categorized. Which method is used to achieve this & how it is done practically?
What jobs alu of 8085 can perform?
What's your experience with qa engineering?
What is the difference between 8085 microprocessor and 8086 microprocessor?
How to detect a sequence of "1101" arriving serially from a signal line?
Classify interrupts on the basis of signals. State their differences.
What does a microprocessor mean?
Which register handles the arithmetic operations in the 8085?
What are the conditions under which the eu enter into the wait mode?
What are the functions of base registers?
What are the qualifiers in c?
Can we put breakpoint inside isr?