Which gate is normally preferred while implementing circuits using CMOS logic, NAND or NOR? Why?

13 Answers   Intel,

---

Who provides the DRC rules?

5 Answers   Intel,

---

What are the Advantages and disadvantages of Mealy and Moore?

0 Answers   Intel,

---

What is pipelining and how can we increase throughput using pipelining?

1 Answers   Intel,

---

How can you model a SRAM at RTL Level?

1 Answers  

---

---

What is Noise Margin? Explain the procedure to determine Noise Margin?

4 Answers   Amkor, Cisco, Infosys, Intel,

---

What are the different classification of the timing control?

0 Answers  

---

How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?

0 Answers   Infosys,

---

what is Latch up?How to avoid Latch up?

3 Answers  

---

Cross section of an NMOS transistor?

3 Answers   Intel,

---

Basic Stuff related to Perl?

0 Answers   Intel,

---

What is the purpose of having depletion mode device?

0 Answers  

---