For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)

0 Answers   Infosys,

---

What is the difference between the mealy and moore state machine?

0 Answers  

---

what is a sequential circuit?

0 Answers  

---

What is interrupt latency?

3 Answers  

---

Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.

1 Answers   Intel,

---

---

What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?

1 Answers   Intel,

---

What happens if we delay the enabling of Clock signal?

4 Answers  

---

Explain how binary number can give a signal or convert into a digital signal?

0 Answers  

---

A circuit has 1 input X and 2 outputs A and B. If X = HIGH for 4 clock ticks, A = 1. If X = LOW for 4 clock ticks, B = 1. Draw a state diagram for this Spec?

3 Answers   Intel,

---

Are you familiar with the term snooping?

0 Answers   Intel,

---

What are set up time & hold time constraints? What do they signify?

3 Answers  

---

Implement a function with both ratioes and domino logic and merits and demerits of each logic?

0 Answers   Intel,

---