Suppose you have a combinational circuit between two
registers driven by a clock. What will you do if the delay
of the combinational circuit is greater than your clock
signal? (You can't resize the combinational circuit
transistors)
- 6 Answers
- 11455 Views
- I also Faced
- E-Mail Answers
Answer Posted / anonymous
Insert a reg slice
| Is This Answer Correct ? | 8 Yes | 1 No |
Post New Answer View All Answers
If not into production, how far did you follow the design and why did not you see it into production?
Explain Cross section of an NMOS transistor?
What is Noise Margin? Explain the procedure to determine Noise Margin?
Give various factors on which threshold voltage depends.
Are you familiar with the term MESI?
Basic Stuff related to Perl?
Implement a function with both ratioes and domino logic and merits and demerits of each logic?
Draw the Cross Section of an Inverter? Clearly show all the connections between M1 and poly, M1 and diffusion layers etc?
What was your role in the silicon evaluation/product ramp? What tools did you use?
Explain how MOSFET works?
What are the steps involved in preventing the metastability?
How can you model a SRAM at RTL Level?
Give the cross-sectional diagram of the cmos.
Explain the Various steps in Synthesis?
Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.
