What work have you done on full chip Clock and Power distribution? What process technology and budgets were used?
What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
What types of high speed CMOS circuits have you designed?
What transistor level design tools are you proficient with? What types of designs were they used on?
What products have you designed which have entered high volume production?
What was your role in the silicon evaluation or product ramp? What tools did you use?
If not into production, how far did you follow the design and why did not you see it into production?
Implement F= not (AB+CD) using CMOS gates?
What does the above code synthesize to?
Cross section of a PMOS transistor?
Implement a 2 I/P and gate using Tran gates?
Insights of a 4bit adder/Sub Circuit?
Explain the working of 4-bit Up/down Counter?
Explain the operation of a 6T-SRAM cell?