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Design a circuit to detect when 3 and only 3 bits are set
out of 8 bits.(eg. o0101100)
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Answer Posted / kalyanpa
for serially arriving stream:
use a 2 bit accumulator( S1 and S2) with outputs O1 and O2.
Final Output will be Y = ~O1 . O2
For parallel,
use combinational logic , probably priority encoder to
reduce delay.
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