Differences between DRAM and SRAM?
- 14 Answers
- 68247 Views
- Infosys, Intel, University, Wipro, I also Faced
- E-Mail Answers
Answer Posted / syed murtaza
DRAM stands for dynamic Random Access Memory. In DRAM, individual cells are made by using capacitors. This type of memory is used in most of the computers. In order to maintain data in DRAM chip, it must be refreshed with electric charge frequently (or periodically). Otherwise data stored in DRAM my be lost. During refreshing process, CPU has to wait for writing and reading data to and from the DRAM. Therefor it is slow memory.
SRAM.
SRAM stants for Static Random Access memory. In SRAM, indidual cells are made by using digital gates. Each cell can hold its value without any need to refresh it frequently. It is faster than DRAM; because it does not have to be refreshed with electric charge frequently. CPU does not have to wit to access data from SRAM. The SRAM chips utilize less power. The SRAM chip is more expensive than the DRAM chip.
In most modern computer SRAM technology is used to build very fast memory. This memory is known as the cache memory.
| Is This Answer Correct ? | 7 Yes | 2 No |
Post New Answer View All Answers
Basic Stuff related to Perl?
What was your role in the silicon evaluation/product ramp? What tools did you use?
Explain the operation considering a two processor computer system with a cache for each processor.
Approximately, what were the sizes of your transistors in the SRAM cell? How did you arrive at those sizes?
In Verilog code what does “timescale 1 ns/ 1 ps” signifies?
If not into production, how far did you follow the design and why did not you see it into production?
What happens if we use an Inverter instead of the Differential Sense Amplifier?
Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes considering Channel Length Modulation.
What is the difference between nmos and pmos technologies?
What types of CMOS memories have you designed? What were their size? Speed?
Explain the Charge Sharing problem while sampling data from a Bus?
What are the Factors affecting Power Consumption on a chip?
Explain why is the number of gate inputs to cmos gates usually limited to four?
In a SRAM layout, which metal layers would you prefer for Word Lines and Bit Lines? Why?
Cross section of a PMOS transistor?
