Answer Posted / arun
It has a I/P signal similar to ordinary inverter & it has
an additional enable i/p which controls the o/p signal with
respect to i/p signal.. The o/p signal can have 3 states
ENABLE I/P O/P
0 X Z
1 0 1
1 1 0
Is This Answer Correct ? | 10 Yes | 0 No |
Post New Answer View All Answers
Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing transistor width.
what is a sequential circuit?
Explain CMOS Inverter transfer characteristics?
What was your role in the silicon evaluation or product ramp? What tools did you use?
How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?
what is Slack?
Draw the Layout of an Inverter?
Explain what is scr (silicon controlled rectifier)?
What does the above code synthesize to?
Are you familiar with the term snooping?
What is the critical path in a SRAM?
In the design of a large inverter, why do we prefer to connect small transistors in parallel (thus increasing effective width) rather than lay out one transistor with large width?
why is the number of gate inputs to CMOS gates usually limited to four?
How binary number can give a signal or convert into a digital signal?
Explain the working of Insights of a pass gate ?