Answer Posted / dooce mcloose
n p n
| Is This Answer Correct ? | 6 Yes | 11 No |
Post New Answer View All Answers
What transistor level design tools are you proficient with? What types of designs were they used on?
Explain the operation considering a two processor computer system with a cache for each processor.
What does it mean “the channel is pinched off”?
What is the main function of metastability in vsdl?
What is the difference between nmos and pmos technologies?
What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus
What are the different ways in which antenna violation can be prevented?
What was your role in the silicon evaluation/product ramp? What tools did you use?
What types of CMOS memories have you designed? What were their size? Speed?
Explain Basic Stuff related to Perl?
What is the function of tie-high and tie-low cells?
Give a big picture of the entire SRAM Layout showing your placements of SRAM Cells, Row Decoders, Column Decoders, Read Circuit, Write Circuit and Buffers
If an/ap = 0.5, an/ap = 1, an/ap = 3, for 3 inverters draw the transfer characteristics?
Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;
How can you construct both PMOS and NMOS on a single substrate?