Which gate is normally preferred while implementing circuits
using CMOS logic, NAND or NOR? Why?
Answer Posted / naseemuddin ansari
NAAND gate is more preferred than NOR because high to low
and low to high transition time is less in NAND as compared
to NOR
| Is This Answer Correct ? | 25 Yes | 3 No |
Post New Answer View All Answers
what is multiplexer?
Cross section of a PMOS transistor?
For f = AB+CD if B is S-a-1, what are the test vectors needed to detect the fault?
Mention what are the different gates where Boolean logic are applicable?
Draw the Cross Section of an Inverter? Clearly show all the connections between M1 and poly, M1 and diffusion layers etc?
How can you construct both PMOS and NMOS on a single substrate?
How to improve these parameters? (Cascode topology, use long channel transistors)
What is Body Effect?
Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing Vgs.
What is the difference between the mealy and moore state machine?
Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times
Give various factors on which threshold voltage depends.
What types of high speed CMOS circuits have you designed?
Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.
Write a VLSI program that implements a toll booth controller?