Interested to Buy Any Domain ? << Click Here >> for more details...
Which gate is normally preferred while implementing circuits
using CMOS logic, NAND or NOR? Why?
- 13 Answers
- 37819 Views
- Intel, I also Faced
- E-Mail Answers
Answer Posted / naseemuddin ansari
NAAND gate is more preferred than NOR because high to low
and low to high transition time is less in NAND as compared
to NOR
| Is This Answer Correct ? | 25 Yes | 3 No |
Post New Answer View All Answers
What happens if we use an Inverter instead of the Differential Sense Amplifier?
Give a big picture of the entire SRAM Layout showing your placements of SRAM Cells, Row Decoders, Column Decoders, Read Circuit, Write Circuit and Buffers
What are the different design techniques required to create a layout for digital circuits?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
Explain what is Verilog?
What are the ways to Optimize the Performance of a Difference Amplifier?
Explain the Working of a 2-stage OPAMP?
what is the use of defpararm?
How to improve these parameters? (Cascode topology, use long channel transistors)
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
Give the cross-sectional diagram of the cmos.
What is the function of tie-high and tie-low cells?
Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times
What is the difference between synchronous and asynchronous reset?
what is the difference between the TTL chips and CMOS chips?
