Have you studied pipelining? List the 5 stages of a 5 stage
pipeline. Assuming 1 clock per stage, what is the latency of
an instruction in a 5 stage machine? What is the throughput
of this machine ?

Answer Posted / mallikarjun patil

I have worked on design consit of 5 stage pipeline
processor.

With 5 stage pipeline it takes minimum 5 clock cycle to to
execute a instuction. So latency of instuction is5 clock
cycles.

Through put is one instruction per clock cycle + initial
overhed of 4 clock cycle

Is This Answer Correct ?    27 Yes 3 No



Post New Answer       View All Answers


Please Help Members By Posting Answers For Below Questions

What are the steps required to solve setup and hold violations in vlsi?

628


How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?

742


Working of a 2-stage OPAMP?

2609


For CMOS logic, give the various techniques you know to minimize power consumption

861


What happens if we use an Inverter instead of the Differential Sense Amplifier?

2729






What are the different design constraints occur in the synthesis phase?

690


You have three adjacent parallel metal lines. Two out of phase signals pass through the outer two metal lines. Draw the waveforms in the centre metal line due to interference. Now, draw the signals if the signals in outer metal lines are in phase with each other

963


For f = AB+CD if B is S-a-1, what are the test vectors needed to detect the fault?

737


Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing transistor width.

788


Explain Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

614


Insights of a 4bit adder/Sub Circuit?

2849


Explain the operation considering a two processor computer system with a cache for each processor.

2352


What types of high speed CMOS circuits have you designed?

2062


Explain why present VLSI circuits use MOSFETs instead of BJTs?

648


If an/ap = 0.5, an/ap = 1, an/ap = 3, for 3 inverters draw the transfer characteristics?

2011