Interested to Buy Any Domain ? << Click Here >> for more details...
A circuit has 1 input X and 2 outputs A and B. If X = HIGH
for 4 clock ticks, A = 1. If X = LOW for 4 clock ticks, B =
1. Draw a state diagram for this Spec?
- 3 Answers
- 9722 Views
- Intel, I also Faced
- E-Mail Answers
Answer Posted / amit malik
Output Swept
------------------------
PS X NS A B
S0 0 S1 0 0
S0 1 S2 0 0
S1 0 S3 0 0
S1 1 S2 0 0
S2 0 S1 0 0
S2 1 S4 0 0
S3 0 S5 0 0
S3 1 S2 0 0
S4 0 S1 0 0
S4 1 S6 0 0
S5 0 S1 0 1
S5 1 S2 0 0
S6 0 S1 0 0
S6 1 S2 1 0
| Is This Answer Correct ? | 4 Yes | 4 No |
Post New Answer View All Answers
You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?
Explain what is multiplexer?
Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;
What are the different design techniques required to create a layout for digital circuits?
Implement a 2 I/P and gate using Tran gates?
What are the ways to Optimize the Performance of a Difference Amplifier?
What are the different gates where boolean logic are applicable?
Explain why is the number of gate inputs to cmos gates usually limited to four?
Explain what is the use of defpararm?
Design an 8 is to 3 encoder using 4 is to encoder?
What are the Advantages and disadvantages of Mealy and Moore?
Draw the Cross Section of an Inverter? Clearly show all the connections between M1 and poly, M1 and diffusion layers etc?
What products have you designed which have entered high volume production?
Explain the Charge Sharing problem while sampling data from a Bus?
Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes considering Channel Length Modulation.
