What are the different limitations in increasing the power
supply to reduce delay?
Answer Posted / madhu
if we increase power supply to reduce delay ,delay will
reduces but power dissipation will be high and to
compensate the excessive power we have to increase die size
which is impractical.
| Is This Answer Correct ? | 9 Yes | 0 No |
Post New Answer View All Answers
Draw the Cross Section of an Inverter? Clearly show all the connections between M1 and poly, M1 and diffusion layers etc?
What does the above code synthesize to?
Explain the three regions of operation of a mosfet.
Design an 8 is to 3 encoder using 4 is to encoder?
How logical gates are controlled by boolean logic?
Explain the Various steps in Synthesis?
Explain why present VLSI circuits use MOSFETs instead of BJTs?
What is Body Effect?
Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?
Explain Basic Stuff related to Perl?
Write a program to explain the comparator?
Give a big picture of the entire SRAM Layout showing your placements of SRAM Cells, Row Decoders, Column Decoders, Read Circuit, Write Circuit and Buffers
what is the difference between the TTL chips and CMOS chips?
what is SCR (Silicon Controlled Rectifier)?
Explain the working of 4-bit Up/down Counter?