Answer Posted / bhyreshkj

R= L/W * Rs Where,

R= resistance
L= length
W= width
Rs= Sheet resistance

Calculate rise delay of a 3-input NAND gate driving a 3-input NOR gate through a 6mm long and 0.45m wide metal wire with sheet resistance R = 0.065 / and Cpermicron= 0.25 fF/m. The resistance and capacitance of the unit NMOS are 6.5k and 2.5fF. Use a 3 segment -model for the wire. Consider PMOS and NMOS size of reference inverter as 2 and 1 respectively. Use appropriate sizing for the NAND and NOR gate.

3871

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You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?

2677

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Explain why is the number of gate inputs to cmos gates usually limited to four?

1515

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For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)

1287

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Explain Cross section of an NMOS transistor?

1048

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Give a big picture of the entire SRAM Layout showing your placements of SRAM Cells, Row Decoders, Column Decoders, Read Circuit, Write Circuit and Buffers

1116

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Explain the working of Insights of a pass gate ?

1243

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What is Body Effect?

2529

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What is the difference between synchronous and asynchronous reset?

1104

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what are three regions of operation of MOSFET and how are they used?

1244

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Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing Vgs.

1123

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In a SRAM layout, which metal layers would you prefer for Word Lines and Bit Lines? Why?

4135

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What types of CMOS memories have you designed? What were their size? Speed?

3147

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Explain the operation considering a two processor computer system with a cache for each processor.

2862

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Explain what is the use of defpararm?

1158

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