Interested to Buy Any Domain ? << Click Here >> for more details...
A circuit has 1 input X and 2 outputs A and B. If X = HIGH
for 4 clock ticks, A = 1. If X = LOW for 4 clock ticks, B =
1. Draw a state diagram for this Spec?
- 3 Answers
- 9718 Views
- Intel, I also Faced
- E-Mail Answers
Answer Posted / techie
PS X NS A B
S0 0 S1 0 0
S0 1 S2 0 0
S1 0 S3 0 0
S1 1 S2 0 0
S2 0 S1 0 0
S2 1 S4 0 0
S3 0 S5 0 0
S3 1 S2 0 0
S4 0 S1 0 0
S4 1 S6 0 0
S5 0 S0 0 1
S5 1 S2 0 0
S6 0 S1 0 0
S6 1 S0 1 0
This would be for non overlapping sequence. The above post correctly captrued overlapping sequence.
| Is This Answer Correct ? | 1 Yes | 1 No |
Post New Answer View All Answers
Implement a 2 I/P and gate using Tran gates?
What types of CMOS memories have you designed? What were their size? Speed?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
In the design of a large inverter, why do we prefer to connect small transistors in parallel (thus increasing effective width) rather than lay out one transistor with large width?
Draw the timing diagram for a SRAM Read. What happens if we delay the enabling of Clock signal?
Explain Cross section of a PMOS transistor?
Explain how MOSFET works?
what is the difference between the TTL chips and CMOS chips?
What is the main function of metastability in vsdl?
What is look up table in vlsi?
What was your role in the silicon evaluation or product ramp? What tools did you use?
What is the difference between cmos and bipolar technologies?
Draw the stick diagram of a NOR gate. Optimize it
What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?
Insights of a 4bit adder/Sub Circuit?
