Answer Posted / daud
when the Vds becomes greater than Vgs-Vt, the channel near drains becomes depleted and effective channel length reduces. This in effect reduces the resistance of channel as the drain voltage increases. This effect is called channel length modulation
Is This Answer Correct ? | 1 Yes | 0 No |
Post New Answer View All Answers
Give the cross-sectional diagram of the cmos.
Differences between IRSIM and SPICE?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
What products have you designed which have entered high volume production?
Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes considering Channel Length Modulation.
What are the main issues associated with multiprocessor caches and how might you solve them?
Working of a 2-stage OPAMP?
What is the function of enhancement mode transistor?
What is Body Effect?
Approximately, what were the sizes of your transistors in the SRAM cell? How did you arrive at those sizes?
How can you model a SRAM at RTL Level?
Explain the Charge Sharing problem while sampling data from a Bus?
What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?
Explain what is the use of defpararm?
What are the different ways in which antenna violation can be prevented?