Which gate is normally preferred while implementing circuits
using CMOS logic, NAND or NOR? Why?
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Answer Posted / velpula prakash
1. Actually in cmos nand pmos devices are in llel and nmos are in series where as in nor reverse,and mobility of electrons is almost three times faster than the holes.so in nor holes has to cross the two channel lengths so they can drive the output little bit late where as in nand electrons has to pass through only one channnel length,so they drive the output to high early.
2. High to Low and low to high times for nand is almost same where as for nor low to high time is greater than the high to low.
3. actually in nor gates because holes drives the output to high in some what high time so to reduce that time manufacturers use to make the pmos in larger size than nmos(only in cmos nor gate),so if we make that pmos larger size it can produce larger number of holes and it can drive the output to high in lesser time .
4. Due to third point nor gates uses some what greater silicon area as compared to nand gates , so the nor gates are somewhat higher cost than that of nor gates.
5. So industry people usually buys so many gates , if they buy nand gates the investment reduces.
Thanks and regards
velpula prakash
if there are any wrongs in my post pls respond to them
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