Differences between blocking and Non-blocking statements in
Verilog?

Answer Posted / darshan

DURING BLOCKING STATEMENTS, PREVIOUS VALUES GETS STORED TO
THE LHS.

WHERE AS IN NON BLOCKING STATEMENT, SINCE IT IS EXECUTING IN
PARALLEL 1ST SIMULATOR READS AND STORES IN TEMPORARY
REGISTER INTERNALLY IN SIMULATOR. THEN AT THE END OF THE
TIME UNIT IT IS ASSIGNED TO THE LHS.

ANYWAYS FROM MY POINT OF VIEW A OR B DONT GET THE PREV/OLD
VALUE

Is This Answer Correct ?    7 Yes 2 No



Post New Answer       View All Answers


Please Help Members By Posting Answers For Below Questions

Implement a function with both ratioes and domino logic and merits and demerits of each logic?

709


Are you familiar with the term snooping?

2915


How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?

732


Explain Cross section of a PMOS transistor?

739


Implement a function with both ratioed and domino logic and merits and demerits of each logic?

3223






What are the main issues associated with multiprocessor caches and how might you solve them?

1732


How can you model a SRAM at RTL Level?

5247


Explain CMOS Inverter transfer characteristics?

3440


Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times

1059


Give a big picture of the entire SRAM Layout showing your placements of SRAM Cells, Row Decoders, Column Decoders, Read Circuit, Write Circuit and Buffers

629


What transistor level design tools are you proficient with? What types of designs were they used on?

2865


What types of CMOS memories have you designed? What were their size? Speed?

2620


What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?

1997


What is the function of chain reordering?

614


Given a layout, draw its transistor level circuit. (I was given a 3 input AND gate and a 2 input Multiplexer. You can expect any simple 2 or 3 input gates)

714