A circuit has 1 input X and 2 outputs A and B. If X = HIGH
for 4 clock ticks, A = 1. If X = LOW for 4 clock ticks, B =
1. Draw a state diagram for this Spec?
Answer Posted / user
PS X NS A B
S0 0 S1 0 0
S0 1 S2 0 0
S1 0 S3 0 0
S1 1 S2 0 0
S2 0 S1 0 0
S2 1 S4 0 0
S3 0 S5 0 0
S3 1 S2 0 0
S4 0 S1 0 0
S4 1 S6 0 0
S5 0 S5 0 1
S5 1 S2 0 0
S6 0 S1 0 0
S6 1 S6 1 0
| Is This Answer Correct ? | 5 Yes | 1 No |
Post New Answer View All Answers
what is Slack?
What types of CMOS memories have you designed? What were their size? Speed?
Implement a function with both ratioed and domino logic and merits and demerits of each logic?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
What are the steps required to solve setup and hold violations in vlsi?
Write a program to explain the comparator?
Draw the stick diagram of a NOR gate. Optimize it
What does it mean “the channel is pinched off”?
Why does the present vlsi circuits use mosfets instead of bjts?
What is the critical path in a SRAM?
How binary number can give a signal or convert into a digital signal?
Given a layout, draw its transistor level circuit. (I was given a 3 input AND gate and a 2 input Multiplexer. You can expect any simple 2 or 3 input gates)
Explain Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
What is the function of tie-high and tie-low cells?
What are the different design constraints occur in the synthesis phase?