In what cases do you need to double clock a signal before
presenting it to a synchronous state machine?
Answer Posted / amar
this situation basically arises when a signal does clock
domain crossing. to synchronize the clock with the target
domain clock and to avoid metastability issues synchronizers
which are like double clocking are used in designs
| Is This Answer Correct ? | 19 Yes | 1 No |
Post New Answer View All Answers
If the current through the poly is 20nA and the contact can take a max current of 10nA how would u overcome the problem?
How do you size NMOS and PMOS transistors to increase the threshold voltage?
What was your role in the silicon evaluation or product ramp? What tools did you use?
What are the ways to Optimize the Performance of a Difference Amplifier?
Give the cross-sectional diagram of the cmos.
Explain Cross section of a PMOS transistor?
What types of high speed CMOS circuits have you designed?
What is the main function of metastability in vsdl?
What is the difference between the mealy and moore state machine?
Working of a 2-stage OPAMP?
What products have you designed which have entered high volume production?
What is the purpose of having depletion mode device?
What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements?
Mention what are the two types of procedural blocks in Verilog?
What is the function of chain reordering?