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Which gate is normally preferred while implementing circuits
using CMOS logic, NAND or NOR? Why?
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Answer Posted / sarang
NAND is a better gate for design than NOR because at the
transistor level the mobility of electrons of NAND is
normally three times that of holes compared to NOR and thus
the NAND is a faster gate. The gate-leakage in NAND
structures is much lower. If you consider t_phl and t_plh
delays you will find that it is more symmetric in case of
NAND (the delay profile), but for NOR, one delay is much
higher than the other(obviously t_plh is higher since the
higher resistance PMOSs are in series connection which
again increases the resistance).
| Is This Answer Correct ? | 18 Yes | 6 No |
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