What is Latch Up? Explain Latch Up with cross section of a CMOS Inverter. How do you avoid Latch Up?

1345

---

Draw a CMOS Inverter. Explain its transfer characteristics

1190

---

How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?

1211

---

For an AND-OR implementation of a two input Mux, how do you test for Stuck-At-0 and Stuck-At-1 faults at the internal nodes? (You can expect a circuit with some redundant logic)

1281

---

For CMOS logic, give the various techniques you know to minimize power consumption

1414

---

What is Charge Sharing? Explain the Charge Sharing problem while sampling data from a Bus

1278

---

Draw the SRAM Write Circuitry

1201

---

Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram

1485

---

Why do we gradually increase the size of inverters in buffer design? Why not give the output of a circuit to one large inverter?

1301

---

For a NMOS transistor acting as a pass transistor, say the gate is connected to VDD, give the output for a square pulse input going from 0 to VDD

1463

---

Draw Vds-Ids curve for a MOSFET. Now, show how this curve changes with increasing transistor width.

1307

---

Let A & B be two inputs of the NAND gate. Say signal A arrives at the NAND gate later than signal B. To optimize delay, of the two series NMOS inputs A & B, which one would you place near the output?

1465

---

Why is digital communication better than analogue communication?

845

---

Using four cascaded counters with a total of 8 bits, how many states must be deleted to achieve a modulus of 20,000?

1022

---

How many bits microprocessor was first developed?

1056

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