what is race around condition
Answer Posted / abhinandan kumar
we know that when j=k=1 in a jk flip flop then output is
the complement of the previous output i.e if j=k=1 and Y=0
then after the clock pulse y becomes 1.
but if the propagation delay of the gates is much lesser
than the pulse duration then during the same pulse at first
y becomes 0 and after another propagation delay y becomes 1
and so on.
thus within the same pulse duration due to very small
propagation delays output oscillates back and forth between
0 and 1. this condition is called race around condition and
at the end of the pulse the output is uncertain.
so this can be avoided by using only edgetriggerd ff
rahter than using level triggerd.
Is This Answer Correct ? | 28 Yes | 9 No |
Post New Answer View All Answers
What are the applications of demultiplexer?
State the differences between a flip-flop and a latch?
What is a stage? Explain its functioning.
how can power amp inc the power without inc the voltage or current values?
hi... if anybody wrote Airport Authority of India(ATC) examination.... pls kindly post the Questions wat they asked... specially in English & Reasonings.... it will useful to all others who are going to write AAI (Electronics) exam....
Differentiate between microcontroller and microprocessor.
how do link aT1 from the 1st BTS to 2nd BTS4?
Explain About RRC states
why can't we share the charging of one phone to another phone? it would be useful during emergency times!! And the mode of sharing should be wireless...
i want assit.loco poilet sample papers
sir, i have completed engineering diploma in electronics and now got the call letter for written exam for the post "junior engineer" from rrb chennai. could you help me about the model and type of questions that i should prepair?
Hr round and technical
What are the limitations of the basic integrator circuit?
What is effective communication?
What is engineering?