Interested to Buy Any Domain ? << Click Here >> for more details...
Differences between D-Latch and D flip-flop?
- 17 Answers
- 65209 Views
- AIT, Intel, Sibridge Technologies, I also Faced
- E-Mail Answers
Answer Posted / sarita bhan
Answer 3 is right. One more difference is that fllipflops
take twice the number of gates as latches
2) so automatically delay is more for flipflops
3)power consumption is also more.
| Is This Answer Correct ? | 78 Yes | 17 No |
Post New Answer View All Answers
Mention what are three regions of operation of mosfet and how are they used?
Explain Cross section of a PMOS transistor?
Implement a 2 I/P and gate using Tran gates?
What are the different design constraints occur in the synthesis phase?
Give the logic expression for an AOI gate. Draw its transistor level equivalent. Draw its stick diagram
In a SRAM layout, which metal layers would you prefer for Word Lines and Bit Lines? Why?
Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times
Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
What is the ideal input and output resistance of a current source?
Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads.
6-T XOR gate?
Differences between IRSIM and SPICE?
What happens if we use an Inverter instead of the Differential Sense Amplifier?
what is verilog?
