Answer Posted / seokchai

latch does not have clock while flip-flop does

Mention what are the two types of procedural blocks in Verilog?

1279

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Basic Stuff related to Perl?

2803

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In vlsi chip 1000s of transistors are dropped, specifically categorized. Which method is used to achieve this & how it is done practically?

1006

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Help with VHDL programming. Write a VHDL code for a D-Latch with clear input ?? (Hint: Set up a “Process” with appropriate sensitivity list to get the desired D-Latch with Clr working.) Inputs AND OUTPUTS: entity Lab4b is Port ( Clr, Clk, D : in STD_LOGIC; Q : out STD_LOGIC); end Lab4b;

1583

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why is the number of gate inputs to CMOS gates usually limited to four?

1326

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Implement a function with both ratioes and domino logic and merits and demerits of each logic?

1191

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Write a program to explain the comparator?

1127

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Explain the Working of a 2-stage OPAMP?

1186

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Explain Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

1061

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Explain why is the number of gate inputs to cmos gates usually limited to four?

1490

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What transistor level design tools are you proficient with? What types of designs were they used on?

3429

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what is multiplexer?

1147

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Explain Cross section of an NMOS transistor?

1017

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What was your role in the silicon evaluation/product ramp? What tools did you use?

3713

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Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?

2315

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