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what is SCR (Silicon Controlled Rectifier)?
Explain what is slack?
You have three adjacent parallel metal lines. Two out of phase signals pass through the outer two metal lines. Draw the waveforms in the centre metal line due to interference. Now, draw the signals if the signals in outer metal lines are in phase with each other
Explain the operation of a 6T-SRAM cell?
What are the steps involved in preventing the metastability?
What is the function of tie-high and tie-low cells?
How can you construct both PMOS and NMOS on a single substrate?
Process technology? What package was used and how did you model the package/system? What parasitic effects were considered?
You have a driver that drives a long signal & connects to an input device. At the input device there is either overshoot, undershoot or signal threshold violations, what can be done to correct this problem?
Mention what are three regions of operation of mosfet and how are they used?
If the current through the poly is 20nA and the contact can take a max current of 10nA how would u overcome the problem?
How does the size of PMOS Pull Up transistors (for bit & bit- lines) affect SRAM's performance?
Design an 8 is to 3 encoder using 4 is to encoder?
Draw a transistor level two input NAND gate. Explain its sizing (a) considering Vth (b) for equal rise and fall times
Given a layout, draw its transistor level circuit. (I was given a 3 input AND gate and a 2 input Multiplexer. You can expect any simple 2 or 3 input gates)
